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2Gb: x16, x32 Mobile LPDDR2 SDRAM S4
Truth Tables
Truth Tables
Truth tables provide complementary information to the state diagram. They also clarify
device behavior and applicable restrictions when considering the actual state of the
banks.
Unspecified operations and timings are illegal. To ensure proper operation after an ille-
gal event, the device must be powered down and then restarted using the specified initi-
alization sequence before normal operation can continue.
Table 49: Command Truth Table
Notes 1–11 apply to all parameters conditions
Command Pins
CKE
CA Pins
CK
Command
CK( n -1)
CK( n )
CS# CA0
CA1
CA2
CA3
CA4
CA5
CA6
CA7
CA8
CA9
Edge
MRW
MRR
H
H
H
H
H
H
L
X
L
L
MA6
L
L
MA7
L
L
OP0
L
L
OP1
H
MA0
OP2
MA0
MA1
OP3
MA1
MA2
OP4
MA2
MA3
OP5
MA3
MA4
OP6
MA4
MA5
OP7
MA5
H
H
X
MA6
MA7
X
REFRESH
H
H
L
L
L
H
L
X
(per bank)
H
H
X
X
REFRESH
H
H
L
L
L
H
H
X
(all banks)
H
H
X
X
Enter self
H
L
L
L
L
H
X
refresh
X
L
X
X
ACTIVATE
(bank)
WRITE (bank)
READ (bank)
PRECHARGE
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
X
L
X
L
X
L
L
R0
H
AP
H
AP
H
H
R1
L
C3
L
C3
H
R8
R2
L
C4
H
C4
L
R9
R3
RFU
C5
RFU
C5
H
R10
R4
RFU
C6
RFU
C6
AB
R11
R5
C1
C7
C1
C7
X
R12
R6
C2
C8
C2
C8
X
BA0
R7
BA0
C9
BA0
C9
BA0
BA1
R13
BA1
C10
BA1
C10
BA1
BA2
R14
BA2
C11
BA2
C11
BA2
(bank)
H
H
X
X
BST
H
H
L
H
H
L
L
X
H
H
X
X
Enter DPD
H
L
L
H
H
L
X
X
L
X
X
NOP
H
H
L
H
H
H
X
H
H
X
X
Maintain PD,
L
L
L
H
H
H
X
SREF, DPD,
(NOP)
L
L
X
X
PDF: 09005aef83f3f2eb
2gb_mobile_lpddr2_s4_g69a.pdf – Rev. N 3/12 EN
105
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2010 Micron Technology, Inc. All rights reserved.
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